Implement a 3-digit BCD counter. Display the contents of the counter on the 7-segment displays, HEX2− 0. Derive a control signal, from the 50-MHz clock signal provided on the DE2 board, to increment the contents of the counter at one-se

Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. In

4 bit switch on altera de2

基于DE2-115开发板，采用控制波动开关 SW[2:0]实现图像±45°，±90°旋转及VGA显示-Implementing the rotation of image based on DE2-115 board. Used switch SW[2:0] to control the orientation of rotating image(±45°&±90°).